This invention relates to electronic data processing systems and more particularly to a central processing unit for use in such systems.
The central processing unit is advantageously instrumented with Large Scale Integration ("LSI") and Medium Scale Integration ("MSI") circuits. Such semiconductor "chips," or circuits, are selected from the Transistor-Transistor Logic ("TTL") family of devices.
TTL devices enjoy widespread use in electronic systems used in many different industries. As a result, many more types of functional subsystems have been embodied in TTL devices than in any of the other device families. Volume production of TTL devices amortizes their development cost and minimizes manufacturing process expenses. The result is that more functions in the processor can be implemented with LSI and MSI components, and these components are available at lower cost.
The widespread use of LSI and MSI devices in the processor results in improved system reliability and decreased design, debugging and servicing costs. Packing density increases and the number of interconnections external to the chips is reduced, thereby minimizing noise and other types of undesired effects.
Thus, the selection of TTL devices helps to create a highly compact, low-cost processor. The small size of the processor, itself an important advantage, contributes to the reduction of noise and other types of problems associated with the design of computers. As a result, special circuits which might otherwise be required to cope with such problems need not be added to the processor.
The central functions of a processor are sometimes carried out using so-called "Super High Speed" (Schottky) TTL circuits. By employing Schottky circuits, a substantial speed advantage over conventional TTL circuits is obtained.
This higher speed is obtained at a price: Schottky devices generate more heat than conventional high speed or standard TTL devices because they are not allowed to "saturate." The electronic hardware associated with one processor using super high speed TTL circuits is described in the copending parent and divisional applications identified in the previous section.